3.3 MULTIPLEXER
Multiplexers were used extensively in the design for the POWERALU03 since there are many variables from which the chip has to select one or two depending on the issued opcode or operation. The multiplexer selects a particular input based on the given select signal. Since the chip is to deal with 8-bit variables, all multiplexers were designed to select variables with 8 bits instead. In general three sizes of multiplexers were needed: An eight-bit 4:1, eight-bit 2:1 and a single-bit 2:1. All the blocks are designed using the ternary conditional operator in Verilog.