4. DESIGN FLOW

In such types of designs it is very important to adapt a certain design flow methodology which guarantees that the transfer from one stage to another is not performed until all previous stages have passed the testing and verification processes. For POWERALU03, the design flow is best summarized in figure 11. In few words, the design started by implementing each separate unit in Verilog code and thin testing it with a separate testbench. Then sub units were integrated and tested again. The Verilog code for the design was then synthesized with Synopsys and Cadence tools.